Fixes defined variables, fixes live variables, implements reduces registers, fixes risc semantic
This commit is contained in:
elvis
@ -59,7 +59,8 @@ module RISCAssembly = struct
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type t = {
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code : risci list;
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inputval: int option
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inputval: int option;
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inputoutputreg: (register * register) option;
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}
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let pp_risci (ppf: out_channel) (v: risci) : unit =
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@ -285,4 +286,9 @@ let rec helper
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let convert (prg: CfgRISC.RISCCfg.t) : RISCAssembly.t =
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{code = (helper prg (Option.get prg.initial) [] |> fst |>
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List.append ([Label "main"] : RISCAssembly.risci list));
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inputval = prg.inputVal}
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inputval = prg.inputVal;
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inputoutputreg =
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match prg.inputOutputVar with
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None -> None
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| Some (i, o) -> Some ({index = i}, {index = o})
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}
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@ -50,7 +50,8 @@ module RISCAssembly : sig
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type t = {
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code : risci list;
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inputval: int option
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inputval: int option;
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inputoutputreg: (register * register) option;
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}
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val pp_risci : out_channel -> risci -> unit
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@ -13,7 +13,8 @@ module RISCArchitecture = struct
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type t = {
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code: RISC.RISCAssembly.risci list CodeMap.t;
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registers: int RegisterMap.t;
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memory: int MemoryMap.t
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memory: int MemoryMap.t;
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outputreg: Register.t;
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}
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end
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@ -101,7 +102,8 @@ let reduce_instructions (prg: RISCArchitecture.t) (lo: string list) : int =
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else
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prg
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)
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| Nop :: tl -> helper prg tl current_label
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| Nop :: tl ->
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helper prg tl current_label
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| BRegOp (brop, r1, r2, r3) :: tl -> (
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let n = (match_operator_r brop)
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(RegisterMap.find {index = r1.index} prg.registers)
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@ -136,7 +138,8 @@ let reduce_instructions (prg: RISCArchitecture.t) (lo: string list) : int =
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)
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)
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| Load (r1, r3) :: tl -> (
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let n = MemoryMap.find
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let n =
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MemoryMap.find
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(RegisterMap.find {index = r1.index} prg.registers)
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prg.memory
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in
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@ -164,14 +167,29 @@ let reduce_instructions (prg: RISCArchitecture.t) (lo: string list) : int =
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| Label _ :: tl -> helper prg tl current_label
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in
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RegisterMap.find
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{index = "out"}
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prg.outputreg
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(helper prg (CodeMap.find "main" prg.code) "main").registers
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let reduce (prg: RISC.RISCAssembly.t) : int =
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reduce_instructions {code = convert prg;
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registers =
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RegisterMap.singleton
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{index = "in"}
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(Option.value prg.inputval ~default:0);
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memory = MemoryMap.empty} (label_order prg)
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reduce_instructions
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{code = convert prg;
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registers = (
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match prg.inputoutputreg with
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| None ->
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RegisterMap.singleton
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{index = "in"}
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(Option.value prg.inputval ~default:0)
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| Some (i, _) ->
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RegisterMap.singleton
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{index = i.index}
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(Option.value prg.inputval ~default:0)
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);
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memory = MemoryMap.empty;
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outputreg = (
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match prg.inputoutputreg with
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| None -> {index = "out"}
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| Some (_, o) -> {index = o.index}
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)
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}
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(label_order prg)
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@ -50,13 +50,13 @@ let variables_used (instr : DVCfg.elt) : DVCfg.internal list =
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| Nop
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| LoadI (_, _) ->
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acc
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| Store (r1, r2)
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| BRegOp (_, r1, r2, _) ->
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DVCeltSet.add r1.index acc |>
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DVCeltSet.add r2.index
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| BImmOp (_, r1, _, _)
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| URegOp (_, r1, _)
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| Load (r1, _)
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| Store (r1, _) ->
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| Load (r1, _) ->
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DVCeltSet.add r1.index acc
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in
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@ -71,24 +71,18 @@ let variables_used_all (instructions : DVCfg.elt list) : DVCfg.internal list =
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let variables_defined (instructions : DVCfg.elt) : DVCfg.internal list =
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let helper (acc: DVCeltSet.t) (instr: DVCfg.elt) =
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match instr with
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| Nop -> acc
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| Nop
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| Store (_, _) -> acc
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| BRegOp (_, _, _, r3)
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| BImmOp (_, _, _, r3)
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| URegOp (_, _, r3)
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| Load (_, r3)
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| LoadI (_, r3)
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| Store (_, r3) ->
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| LoadI (_, r3) ->
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DVCeltSet.add r3.index acc
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in
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helper DVCeltSet.empty instructions |> DVCeltSet.to_list
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let variables_defined_all (instructions : DVCfg.elt list) : DVCfg.internal list =
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List.fold_left (fun (acc: DVCeltSet.t) (instr: DVCfg.elt) ->
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DVCeltSet.union acc (variables_defined instr |> DVCeltSet.of_list)
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) DVCeltSet.empty instructions |> DVCeltSet.to_list
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(* init function, assign the bottom to everything *)
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let _init_bottom : (DVCfg.elt list -> DVCfg.internalnode) =
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@ -104,91 +98,91 @@ let init_top (all_variables) : (DVCfg.elt list -> DVCfg.internalnode) =
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(fun _ -> (all_variables, all_variables)))})
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(* piece of code that computes vout for the whole block, not used,
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use lub below *)
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let _dumb_lub (t: DVCfg.t) (node: Cfg.Node.t) : DVCfg.internalnode =
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let previnternalvar = Cfg.NodeMap.find node t.internalvar in
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let code = Cfg.NodeMap.find node t.t.content in
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{ previnternalvar with
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internalout =
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Utility.unique_union (variables_defined_all code) (previnternalvar.internalin)
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}
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(* We consider only the propagation in the middle elements during the lub.
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This incurs in a performance penality, but it is simpler to implement.
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Each node is connected to one previus node.
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*)
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let lub (t: DVCfg.t) (node: Cfg.Node.t) : DVCfg.internalnode =
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let previnternalvar = Cfg.NodeMap.find node t.internalvar in
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let code = match Cfg.NodeMap.find_opt node t.t.content with
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None -> []
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| Some c -> c
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in
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let newinternalbetween = (
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List.map
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(fun (code, (i, _o)) ->
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(i, Utility.unique_union i (variables_defined code)))
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(List.combine code previnternalvar.internalbetween)
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) in
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let newinternalout =
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match newinternalbetween with
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| [] -> previnternalvar.internalin
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| _ -> (snd (Utility.last_list newinternalbetween))
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in
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{ previnternalvar with
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internalbetween =
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List.mapi (* we don't NEED the index but i = 0 is easier to write than
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to check if vinout is None *)
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(fun i (ithcode, vinout, ithcodeprev) ->
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if i = 0 then
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let dvin = previnternalvar.internalin in
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(dvin, Utility.unique_union dvin (variables_defined ithcode))
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else (
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let ithcodeprev = match ithcodeprev with
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None -> ([], [])
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| Some x -> x
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in
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match vinout with
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None ->
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([], variables_defined ithcode)
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| Some prevdvbtw ->
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(snd prevdvbtw,
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Utility.unique_union
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(variables_defined ithcode)
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(ithcodeprev |> fst)
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))
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)
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(* ugly code that zips the three lists that we need to compute each vin
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and vout for the middle of the code *)
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(Utility.combine_thrice
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code
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(Utility.pad_opt
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(Utility.prev previnternalvar.internalbetween None) None (List.length code))
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(Utility.pad previnternalvar.internalbetween None (List.length code))
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);
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internalout =
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match previnternalvar.internalbetween with
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[] -> previnternalvar.internalin
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| _ -> (snd (Utility.last_list previnternalvar.internalbetween))
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}
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internalbetween = newinternalbetween;
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internalout = newinternalout }
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let lucf (t: DVCfg.t) (node: Cfg.Node.t) : DVCfg.internalnode =
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let previnternalvar = Cfg.NodeMap.find node t.internalvar in
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if Option.equal (=) (Some node) t.t.initial then
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(* if L is initial set dvin to the "in" register *)
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let newinternalin = (
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match t.t.inputOutputVar with
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Some (i, _) -> [i]
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| None -> []
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) in
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let newinternalbetween = ( (* set the dvin of each to the previous dvout *)
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match previnternalvar.internalbetween with
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[] -> []
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| [(_i, o)] -> [(newinternalin, o)]
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| (_i, o) :: btwrest ->
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(newinternalin, o) :: (
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List.map (fun ((_i, o), (_previ, prevo)) -> (prevo, o))
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(Utility.combine_twice btwrest previnternalvar.internalbetween)
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)
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) in
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{ previnternalvar with
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internalin =
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match t.t.inputOutputVar with
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Some (i, _) -> [i]
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| None -> []
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}
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internalin = newinternalin;
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internalbetween = newinternalbetween }
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else
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(* if L is not initial set dvin to the intersection of the previous node's
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dvouts *)
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let prevnodes = Cfg.NodeMap.find node t.t.reverseEdges in
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let newinternalin = (
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match prevnodes with
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| [] ->
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[]
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| [prevnode] ->
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(Cfg.NodeMap.find prevnode t.internalvar).internalout
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| [prevnode1; prevnode2] ->
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Utility.unique_intersection
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(Cfg.NodeMap.find prevnode1 t.internalvar).internalout
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(Cfg.NodeMap.find prevnode2 t.internalvar).internalout
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| prevnode :: restnodes ->
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List.fold_left (* intersection of all previous nodes' dvout *)
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(fun acc prevnode ->
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Utility.unique_intersection
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acc
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(Cfg.NodeMap.find prevnode t.internalvar).internalout)
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(Cfg.NodeMap.find prevnode t.internalvar).internalout
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restnodes
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) in
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let newinternalbetween =
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match previnternalvar.internalbetween with
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[] -> []
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| [(_i, o)] -> [(newinternalin, o)]
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| (_i, o) :: btwrest ->
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(newinternalin, o) :: (
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List.map (fun ((_i, o), (_previ, prevo)) -> (prevo, o))
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(Utility.combine_twice btwrest previnternalvar.internalbetween)
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)
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in
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{ previnternalvar with
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internalin =
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match prevnodes with
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[] -> []
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| [prevnode] -> (Cfg.NodeMap.find prevnode t.internalvar).internalout
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| [prevnode1; prevnode2] ->
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Utility.unique_intersection
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(Cfg.NodeMap.find prevnode1 t.internalvar).internalout
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(Cfg.NodeMap.find prevnode2 t.internalvar).internalout
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| _ ->
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List.fold_left (* intersection of all previous nodes' dvout *)
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(fun acc prevnode ->
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Utility.unique_intersection acc (Cfg.NodeMap.find prevnode t.internalvar).internalout)
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[]
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prevnodes
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}
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internalin = newinternalin;
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internalbetween = newinternalbetween }
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let update (t: DVCfg.t) (node: Cfg.Node.t) : DVCfg.internalnode =
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@ -198,10 +192,16 @@ let update (t: DVCfg.t) (node: Cfg.Node.t) : DVCfg.internalnode =
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let compute_defined_variables (cfg: RISCCfg.t) : DVCfg.t =
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let all_variables = List.fold_left
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(fun acc (_, code) -> Utility.unique_union acc (variables_all code))
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(fun acc (_, code) ->
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Utility.unique_union acc (variables_all code))
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[]
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(Cfg.NodeMap.to_list cfg.content)
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in
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let all_variables =
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match cfg.inputOutputVar with
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| None -> all_variables
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| Some (i, o) -> Utility.unique_union all_variables [i;o]
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in
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DVCfg.from_cfg cfg
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|> DVCfg.fixed_point ~init:(init_top all_variables) ~update:update
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@ -3,6 +3,7 @@ open Analysis
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module Variable : sig
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type t
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val pp : out_channel -> t -> unit
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val pplist : out_channel -> t list -> unit
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end
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module RISCCfg = CfgRISC.RISCCfg
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@ -13,6 +13,7 @@
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(modules Lexer Parser Types Semantics
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CfgImp ReplacePowerMod
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CfgRISC DefinedVariables LiveVariables
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ReduceRegisters
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RISC RISCSemantics)
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(libraries analysis utility menhirLib))
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@ -24,45 +24,33 @@ let variables_used (instr : DVCfg.elt) : DVCfg.internal list =
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| Nop
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| LoadI (_, _) ->
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acc
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| BRegOp (_, r1, r2, _) ->
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| BRegOp (_, r1, r2, _)
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| Store (r1, r2) ->
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DVCeltSet.add r1.index acc |>
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DVCeltSet.add r2.index
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| BImmOp (_, r1, _, _)
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| URegOp (_, r1, _)
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| Load (r1, _)
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| Store (r1, _) ->
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| Load (r1, _) ->
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DVCeltSet.add r1.index acc
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in
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helper DVCeltSet.empty instr |> DVCeltSet.to_list
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let _variables_used_all (instructions : DVCfg.elt list) : DVCfg.internal list =
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List.fold_left (fun (acc: DVCeltSet.t) (instr: DVCfg.elt) ->
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DVCeltSet.union acc (variables_used instr |> DVCeltSet.of_list)
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) DVCeltSet.empty instructions |> DVCeltSet.to_list
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let variables_defined (instructions : DVCfg.elt) : DVCfg.internal list =
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let helper (acc: DVCeltSet.t) (instr: DVCfg.elt) =
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match instr with
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| Nop -> acc
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| Nop
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| Store (_, _) -> acc
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| BRegOp (_, _, _, r3)
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| BImmOp (_, _, _, r3)
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| URegOp (_, _, r3)
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| Load (_, r3)
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| LoadI (_, r3)
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| Store (_, r3) ->
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| LoadI (_, r3) ->
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DVCeltSet.add r3.index acc
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in
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helper DVCeltSet.empty instructions |> DVCeltSet.to_list
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let _variables_defined_all (instructions : DVCfg.elt list) : DVCfg.internal list =
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List.fold_left (fun (acc: DVCeltSet.t) (instr: DVCfg.elt) ->
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DVCeltSet.union acc (variables_defined instr |> DVCeltSet.of_list)
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) DVCeltSet.empty instructions |> DVCeltSet.to_list
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(* init function, assign the bottom to everything *)
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let init : (DVCfg.elt list -> DVCfg.internalnode) =
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(fun l -> {internalin = [];
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@ -75,58 +63,68 @@ let lub (t: DVCfg.t) (node: Cfg.Node.t) : DVCfg.internalnode =
|
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None -> []
|
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| Some c -> c
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in
|
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|
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let newinternalbetween = (
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List.map
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(fun (code, (_i, o)) ->
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(Utility.unique_union
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(variables_used code)
|
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(Utility.subtraction o (variables_defined code)), o))
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(Utility.combine_twice code previnternalvar.internalbetween)
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) in
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|
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let newinternalin =
|
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match newinternalbetween with
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| [] -> previnternalvar.internalout
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| (i, _)::_ -> i
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in
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|
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{ previnternalvar with
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internalbetween =
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List.map (fun (prevbtw, code, nextprevbtw) ->
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let newin = Utility.unique_union (variables_used code)
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(Utility.subtraction (snd prevbtw) (variables_defined code))
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in
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match nextprevbtw with
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None -> (newin, snd prevbtw)
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| Some (newout, _) -> (newin, newout)
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)
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(Utility.combine_thrice previnternalvar.internalbetween code
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(Utility.pad (List.tl previnternalvar.internalbetween) None (List.length previnternalvar.internalbetween)))
|
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;
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internalin = fst (List.hd previnternalvar.internalbetween);
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}
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internalbetween = newinternalbetween;
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internalin = newinternalin; }
|
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|
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let lucf (t: DVCfg.t) (node: Cfg.Node.t) : DVCfg.internalnode =
|
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let previnternalvar = Cfg.NodeMap.find node t.internalvar in
|
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if Option.equal (=) (Some node) t.t.terminal then
|
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let outputvarlist = match t.t.inputOutputVar with
|
||||
|
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let newinternalout = (
|
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if Option.equal (=) (Some node) t.t.terminal then (
|
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match t.t.inputOutputVar with
|
||||
Some (_, o) -> [o]
|
||||
| None -> []
|
||||
in
|
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{ previnternalvar with
|
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internalout = outputvarlist;
|
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internalbetween = (
|
||||
let last_elem = Utility.last_list previnternalvar.internalbetween in
|
||||
(Utility.drop_last_element_list previnternalvar.internalbetween) @
|
||||
[(fst last_elem, outputvarlist)]
|
||||
)
|
||||
}
|
||||
else
|
||||
let nextnodes = Cfg.NodeMap.find_opt node t.t.edges in
|
||||
let newinternalout = match nextnodes with
|
||||
None -> []
|
||||
| Some (node, None) -> (Cfg.NodeMap.find node t.internalvar).internalin
|
||||
) else (
|
||||
let nextnodes = Cfg.NodeMap.find_opt node t.t.edges in
|
||||
match nextnodes with
|
||||
| None -> []
|
||||
| Some (node, None) ->
|
||||
(Cfg.NodeMap.find node t.internalvar).internalin
|
||||
| Some (node1, Some node2) ->
|
||||
Utility.unique_union
|
||||
(Cfg.NodeMap.find node1 t.internalvar).internalin
|
||||
(Cfg.NodeMap.find node2 t.internalvar).internalin
|
||||
in
|
||||
{ previnternalvar with
|
||||
internalout = newinternalout;
|
||||
internalbetween = (
|
||||
let last_elem = Utility.last_list previnternalvar.internalbetween in
|
||||
(Utility.drop_last_element_list previnternalvar.internalbetween) @
|
||||
[(fst last_elem, newinternalout)]
|
||||
)
|
||||
}
|
||||
)
|
||||
) in
|
||||
|
||||
let newinternalbetween = (
|
||||
match List.rev previnternalvar.internalbetween with
|
||||
| [] -> []
|
||||
| (i, _o) :: btwrest ->
|
||||
let btwrest = List.rev btwrest in
|
||||
let newbtwrest = List.map2
|
||||
(fun (i, _o) (nexti, _nexto) -> (i, nexti))
|
||||
btwrest
|
||||
(Utility.drop_first_element_list previnternalvar.internalbetween)
|
||||
in
|
||||
newbtwrest @ [(i, newinternalout)]
|
||||
) in
|
||||
|
||||
{ previnternalvar with
|
||||
internalout = newinternalout;
|
||||
internalbetween = newinternalbetween; }
|
||||
|
||||
let update (t: DVCfg.t) (node: Cfg.Node.t) : DVCfg.internalnode =
|
||||
let newt = {t with internalvar = (Cfg.NodeMap.add node (lucf t node) t.internalvar)} in
|
||||
let newt = {t with internalvar = (Cfg.NodeMap.add node
|
||||
(lucf t node)
|
||||
t.internalvar)} in
|
||||
lub newt node
|
||||
|
||||
|
||||
@ -135,10 +133,136 @@ let compute_live_variables (cfg: RISCCfg.t) : DVCfg.t =
|
||||
|> DVCfg.fixed_point ~init:init ~update:update
|
||||
|
||||
|
||||
|
||||
module VariableMap = struct
|
||||
include Map.Make(Variable)
|
||||
|
||||
let first_empty next start m l =
|
||||
let bindings =
|
||||
List.fold_left (
|
||||
fun acc x ->
|
||||
match find_opt x m with
|
||||
| None -> acc
|
||||
| Some x -> x :: acc) [] l |> List.sort Variable.compare in
|
||||
|
||||
let rec aux x =
|
||||
if List.mem x bindings
|
||||
then aux (next x)
|
||||
else x
|
||||
in
|
||||
aux start
|
||||
|
||||
let first_empty_Variable m l =
|
||||
let next = fun x -> x |> int_of_string |> (+) 1 |> string_of_int in
|
||||
let start = "1" in
|
||||
first_empty next start m l
|
||||
|
||||
let get_mapping m l r =
|
||||
match find_opt r m with
|
||||
| None -> (
|
||||
let newr = first_empty_Variable m l in
|
||||
let newm = add r newr m in
|
||||
(newm, newr)
|
||||
)
|
||||
| Some r -> (m, r)
|
||||
end
|
||||
|
||||
|
||||
(* just rename the registers that dont share live status *)
|
||||
let optimize_cfg (t: DVCfg.t) : DVCfg.t =
|
||||
t
|
||||
let replace_code ((vin, vout): Variable.t list * Variable.t list)
|
||||
(a: Variable.t VariableMap.t)
|
||||
(code: DVCfg.elt)
|
||||
: (Variable.t VariableMap.t * DVCfg.elt) =
|
||||
match code with
|
||||
| Nop -> (
|
||||
(a, Nop)
|
||||
)
|
||||
| BRegOp (brop, r1, r2, r3) -> (
|
||||
let (newa, newr1) = VariableMap.get_mapping a vin r1.index in
|
||||
let (newa, newr2) = VariableMap.get_mapping newa vin r2.index in
|
||||
let (newa, newr3) = VariableMap.get_mapping newa vout r3.index in
|
||||
(newa, BRegOp (brop, {index = newr1}, {index = newr2}, {index = newr3}))
|
||||
)
|
||||
| BImmOp (biop, r1, i, r3) -> (
|
||||
let (newa, newr1) = VariableMap.get_mapping a vin r1.index in
|
||||
let (newa, newr3) = VariableMap.get_mapping newa vout r3.index in
|
||||
(newa, BImmOp (biop, {index = newr1}, i, {index = newr3}))
|
||||
)
|
||||
| URegOp (urop, r1, r3) -> (
|
||||
let (newa, newr1) = VariableMap.get_mapping a vin r1.index in
|
||||
let (newa, newr3) = VariableMap.get_mapping newa vout r3.index in
|
||||
(newa, URegOp (urop, {index = newr1}, {index = newr3}))
|
||||
)
|
||||
| Load (r1, r3) -> (
|
||||
let (newa, newr1) = VariableMap.get_mapping a vin r1.index in
|
||||
let (newa, newr3) = VariableMap.get_mapping newa vout r3.index in
|
||||
(newa, Load ({index = newr1}, {index = newr3}))
|
||||
)
|
||||
| LoadI (i, r3) -> (
|
||||
let (newa, newr3) = VariableMap.get_mapping a vout r3.index in
|
||||
(newa, LoadI (i, {index = newr3}))
|
||||
)
|
||||
| Store (r1, r3) -> (
|
||||
let (newa, newr1) = VariableMap.get_mapping a vin r1.index in
|
||||
let (newa, newr3) = VariableMap.get_mapping newa vout r3.index in
|
||||
(newa, Store ({index = newr1}, {index = newr3}))
|
||||
)
|
||||
in
|
||||
|
||||
let aux (assignments: Variable.t VariableMap.t) (t: DVCfg.t) (node: Cfg.Node.t)
|
||||
: (Variable.t VariableMap.t * DVCfg.t) =
|
||||
let livevars = Cfg.NodeMap.find node t.internalvar in
|
||||
let code =
|
||||
match Cfg.NodeMap.find_opt node t.t.content with
|
||||
| None -> []
|
||||
| Some x -> x
|
||||
in
|
||||
let newcode, newassignments =
|
||||
(List.fold_left2
|
||||
(fun (acc, assignments) btw code ->
|
||||
let na, nc = replace_code btw assignments code in
|
||||
(acc @ [nc], na)
|
||||
)
|
||||
([], assignments)
|
||||
livevars.internalbetween
|
||||
code)
|
||||
in
|
||||
let newcontent = Cfg.NodeMap.add
|
||||
node
|
||||
newcode
|
||||
t.t.content
|
||||
in
|
||||
|
||||
let newt = { t with t = { t.t with content = newcontent } } in
|
||||
(newassignments, newt)
|
||||
in
|
||||
|
||||
(* --------- *)
|
||||
|
||||
let assignments = VariableMap.empty in
|
||||
|
||||
let a, newt =
|
||||
Cfg.NodeSet.fold (* for each node we replace all the variables with the
|
||||
optimized ones *)
|
||||
(fun node (ass, t) -> aux ass t node)
|
||||
t.t.nodes
|
||||
(assignments, t)
|
||||
in
|
||||
|
||||
{ newt with
|
||||
t = { newt.t with
|
||||
inputOutputVar =
|
||||
match newt.t.inputOutputVar with
|
||||
None -> None
|
||||
| Some (i, o) -> (
|
||||
match VariableMap.find_opt i a, VariableMap.find_opt o a with
|
||||
| None, None -> Some (i, o)
|
||||
| Some i, None -> Some (i, o)
|
||||
| None, Some o -> Some (i, o)
|
||||
| Some i, Some o -> Some (i, o)
|
||||
)
|
||||
}}
|
||||
|
||||
|
||||
let compute_cfg (dvcfg: DVCfg.t) : RISCCfg.t =
|
||||
|
||||
416
lib/miniImp/reduceRegisters.ml
Normal file
416
lib/miniImp/reduceRegisters.ml
Normal file
@ -0,0 +1,416 @@
|
||||
open Analysis
|
||||
|
||||
module Variable = struct
|
||||
type t = string
|
||||
|
||||
let _pp (ppf: out_channel) (v: t) : unit =
|
||||
Printf.fprintf ppf "%s" v
|
||||
|
||||
let _pplist (ppf: out_channel) (vv: t list) : unit =
|
||||
List.iter (Printf.fprintf ppf "%s, ") vv
|
||||
|
||||
let compare a b =
|
||||
String.compare a b
|
||||
end
|
||||
|
||||
|
||||
module RISCCfg = CfgRISC.RISCCfg
|
||||
module VariableMap = Map.Make(Variable)
|
||||
|
||||
let variables_frequency (instr : RISCCfg.elt) : (Variable.t * int) list =
|
||||
let add_one = (fun x -> match x with None -> Some 1 | Some x -> Some (x + 1)) in
|
||||
|
||||
let helper (acc: int VariableMap.t) (instr: RISCCfg.elt) =
|
||||
match instr with
|
||||
| Nop ->
|
||||
acc
|
||||
| BRegOp (_, r1, r2, r3) ->
|
||||
VariableMap.update r1.index add_one acc |>
|
||||
VariableMap.update r2.index add_one |>
|
||||
VariableMap.update r3.index add_one
|
||||
| BImmOp (_, r1, _, r3)
|
||||
| URegOp (_, r1, r3)
|
||||
| Load (r1, r3)
|
||||
| Store (r1, r3) ->
|
||||
VariableMap.update r1.index add_one acc |>
|
||||
VariableMap.update r3.index add_one
|
||||
| LoadI (_, r3) ->
|
||||
VariableMap.update r3.index add_one acc
|
||||
in
|
||||
|
||||
helper VariableMap.empty instr |> VariableMap.to_list
|
||||
|
||||
let variables_all_frequency (instructions : RISCCfg.elt list) : (Variable.t * int) list =
|
||||
List.fold_left (fun (acc: int VariableMap.t) (instr: RISCCfg.elt) ->
|
||||
VariableMap.union (fun _v x y -> Some (x + y)) acc (variables_frequency instr |> VariableMap.of_list)
|
||||
) VariableMap.empty instructions |> VariableMap.to_list
|
||||
|
||||
|
||||
let reduceregisters (n: int) (cfg: RISCCfg.t) : RISCCfg.t =
|
||||
(if n < 4 then (failwith "ReduceRegisters: number of registers too small") else ());
|
||||
|
||||
(* we get all the variables with associated frequency (only syntactic use) *)
|
||||
let all_variables = List.fold_left
|
||||
(fun acc (_, code) ->
|
||||
Utility.unique_union acc (variables_all_frequency code))
|
||||
[]
|
||||
(Cfg.NodeMap.to_list cfg.content)
|
||||
in
|
||||
let all_variables =
|
||||
match cfg.inputOutputVar with
|
||||
| None -> all_variables
|
||||
| Some (i, _o) -> (
|
||||
match List.assoc_opt i all_variables with
|
||||
| None -> (i, 1) :: all_variables
|
||||
| Some f -> (i, f+1) :: (List.remove_assoc i all_variables)
|
||||
)
|
||||
in
|
||||
let all_variables =
|
||||
match cfg.inputOutputVar with
|
||||
| None -> all_variables
|
||||
| Some (_i, o) -> (
|
||||
match List.assoc_opt o all_variables with
|
||||
| None -> (o, 1) :: all_variables
|
||||
| Some f -> (o, f+1) :: (List.remove_assoc o all_variables)
|
||||
)
|
||||
in
|
||||
|
||||
let replaceregisters
|
||||
(remappedregisters: Variable.t VariableMap.t)
|
||||
(memorymap: int VariableMap.t)
|
||||
(temporaryregisters: Variable.t list)
|
||||
(code: RISCCfg.elt list)
|
||||
: RISCCfg.elt list =
|
||||
|
||||
let tmpreg1: CfgRISC.RISCSimpleStatements.register =
|
||||
{index = List.nth temporaryregisters 0} in
|
||||
let tmpreg2: CfgRISC.RISCSimpleStatements.register =
|
||||
{index = List.nth temporaryregisters 1} in
|
||||
|
||||
let aux (instruction: RISCCfg.elt) : RISCCfg.elt list =
|
||||
match instruction with
|
||||
| Nop -> [Nop]
|
||||
| BRegOp (brop, r1, r2, r3) -> (
|
||||
match ( VariableMap.find_opt r1.index remappedregisters,
|
||||
VariableMap.find_opt r2.index remappedregisters,
|
||||
VariableMap.find_opt r3.index remappedregisters,
|
||||
VariableMap.find_opt r1.index memorymap,
|
||||
VariableMap.find_opt r1.index memorymap,
|
||||
VariableMap.find_opt r3.index memorymap )
|
||||
with
|
||||
| Some r1, Some r2, Some r3, _, _, _ ->
|
||||
[BRegOp (brop, {index = r1}, {index = r2}, {index = r3})]
|
||||
| Some r1, Some r2, None, _, _, Some m3 ->
|
||||
[BRegOp (brop, {index = r1}, {index = r2}, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| Some r1, None, Some r3, _, Some m2, _ ->
|
||||
[LoadI (m2, tmpreg2);
|
||||
Load (tmpreg2, tmpreg2);
|
||||
BRegOp (brop, {index = r1}, tmpreg2, {index = r3})]
|
||||
| None, Some r2, Some r3, Some m1, _, _ ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
BRegOp (brop, tmpreg1, {index = r2}, {index = r3})]
|
||||
| None, None, Some r3, Some m1, Some m2, _ ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
LoadI (m2, tmpreg2);
|
||||
Load (tmpreg2, tmpreg2);
|
||||
BRegOp (brop, tmpreg1, tmpreg2, {index = r3})]
|
||||
| None, None, None, Some m1, Some m2, Some m3 ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
LoadI (m2, tmpreg2);
|
||||
Load (tmpreg2, tmpreg2);
|
||||
BRegOp (brop, tmpreg1, tmpreg2, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| _ -> [BRegOp (brop, {index = r1.index}, {index = r2.index}, {index = r3.index})]
|
||||
)
|
||||
| BImmOp (biop, r1, i, r3) -> (
|
||||
match ( VariableMap.find_opt r1.index remappedregisters,
|
||||
VariableMap.find_opt r3.index remappedregisters,
|
||||
VariableMap.find_opt r1.index memorymap,
|
||||
VariableMap.find_opt r3.index memorymap )
|
||||
with
|
||||
| Some r1, Some r3, _, _ ->
|
||||
[BImmOp (biop, {index = r1}, i, {index = r3})]
|
||||
| Some r1, None, _, Some m3 ->
|
||||
[BImmOp (biop, {index = r1}, i, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| None, Some r3, Some m1, _ ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
BImmOp (biop, tmpreg1, i, {index = r3})]
|
||||
| None, None, Some m1, Some m3 ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
BImmOp (biop, tmpreg1, i, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| _ -> failwith ("ReduceRegisters: fail to partition a set, some" ^
|
||||
" registers have no binding.")
|
||||
)
|
||||
| URegOp (urop, r1, r3) ->(
|
||||
match ( VariableMap.find_opt r1.index remappedregisters,
|
||||
VariableMap.find_opt r3.index remappedregisters,
|
||||
VariableMap.find_opt r1.index memorymap,
|
||||
VariableMap.find_opt r3.index memorymap )
|
||||
with
|
||||
| Some r1, Some r3, _, _ ->
|
||||
[URegOp (urop, {index = r1}, {index = r3})]
|
||||
| Some r1, None, _, Some m3 ->
|
||||
[URegOp (urop, {index = r1}, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| None, Some r3, Some m1, _ ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
URegOp (urop, tmpreg1, {index = r3})]
|
||||
| None, None, Some m1, Some m3 ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
URegOp (urop, tmpreg1, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| _ -> failwith ("ReduceRegisters: fail to partition a set, some" ^
|
||||
" registers have no binding.")
|
||||
)
|
||||
| Load (r1, r3) -> (
|
||||
match ( VariableMap.find_opt r1.index remappedregisters,
|
||||
VariableMap.find_opt r3.index remappedregisters,
|
||||
VariableMap.find_opt r1.index memorymap,
|
||||
VariableMap.find_opt r3.index memorymap )
|
||||
with
|
||||
| Some r1, Some r3, _, _ ->
|
||||
[Load ({index = r1}, {index = r3})]
|
||||
| Some r1, None, _, Some m3 ->
|
||||
[Load ({index = r1}, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| None, Some r3, Some m1, _ ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
Load (tmpreg1, {index = r3})]
|
||||
| None, None, Some m1, Some m3 ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| _ -> failwith ("ReduceRegisters: fail to partition a set, some" ^
|
||||
" registers have no binding.")
|
||||
)
|
||||
| LoadI (i, r3) -> (
|
||||
(* we want to store an integer in memory immediately (strange, but
|
||||
unless better heuristic to choose the variables to replace we are
|
||||
stuck) *)
|
||||
match ( VariableMap.find_opt r3.index remappedregisters,
|
||||
VariableMap.find_opt r3.index memorymap )
|
||||
with
|
||||
| Some r3, _ ->
|
||||
[LoadI (i, {index = r3})]
|
||||
| None, Some m3 ->
|
||||
[LoadI (i, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| _ -> failwith ("ReduceRegisters: fail to partition a set, some" ^
|
||||
" registers have no binding.")
|
||||
)
|
||||
| Store (r1, r3) -> (
|
||||
(* we want to maybe store an address in memory (very confusing, don't
|
||||
think can happen) *)
|
||||
match ( VariableMap.find_opt r1.index remappedregisters,
|
||||
VariableMap.find_opt r3.index remappedregisters,
|
||||
VariableMap.find_opt r1.index memorymap,
|
||||
VariableMap.find_opt r3.index memorymap )
|
||||
with
|
||||
| Some r1, Some r3, _, _ ->
|
||||
[Store ({index = r1}, {index = r3})]
|
||||
| Some r1, None, _, Some m3 ->
|
||||
[Store ({index = r1}, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| None, Some r3, Some m1, _ ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
Store (tmpreg1, {index = r3})]
|
||||
| None, None, Some m1, Some m3 ->
|
||||
[LoadI (m1, tmpreg1);
|
||||
Load (tmpreg1, tmpreg1);
|
||||
Store (tmpreg1, tmpreg2);
|
||||
LoadI (m3, tmpreg1);
|
||||
Store (tmpreg2, tmpreg1)]
|
||||
| _ -> failwith ("ReduceRegisters: fail to partition a set, some" ^
|
||||
" registers have no binding.")
|
||||
)
|
||||
in
|
||||
|
||||
List.map (fun x ->
|
||||
Printf.printf "Converting: %a\n" CfgRISC.RISCSimpleStatements.pp x;
|
||||
let tmp = aux x in
|
||||
Printf.printf "Into: %a\n\n" CfgRISC.RISCSimpleStatements.pplist tmp;
|
||||
tmp
|
||||
) code |> List.concat
|
||||
in
|
||||
|
||||
|
||||
let aux (cfg: RISCCfg.t) all_variables =
|
||||
(* we keep the first two variables free for immediate use *)
|
||||
let most_frequent, least_frequent =
|
||||
List.sort (fun (_a, fa) (_b, fb) -> Int.compare fb fa) all_variables
|
||||
|> Utility.take (n-2)
|
||||
in
|
||||
let most_frequent = fst (List.split most_frequent) in
|
||||
let least_frequent = fst (List.split least_frequent) in
|
||||
|
||||
(* we map the most frequent to new registers, so that the first two are
|
||||
always free *)
|
||||
let most_frequent_mapping = (* +3 because starts at 0, but we want to start
|
||||
at 1*)
|
||||
List.mapi (fun n v -> (v, (string_of_int (n+3): Variable.t))) most_frequent
|
||||
|> VariableMap.of_list
|
||||
in
|
||||
(* we map the least to memory *)
|
||||
let least_frequent_mapping =
|
||||
List.mapi (fun n v -> (v, (n: int))) least_frequent
|
||||
|> VariableMap.of_list
|
||||
in
|
||||
|
||||
Printf.printf "Most freq mapping:\n";
|
||||
List.iter (fun (a, b) -> Printf.printf "%s -> %s\n" a b) (VariableMap.to_list most_frequent_mapping);
|
||||
Printf.printf "Least freq mapping:\n";
|
||||
List.iter (fun (a, b) -> Printf.printf "%s -> mem %d\n" a b) (VariableMap.to_list least_frequent_mapping);
|
||||
|
||||
(* we need to replace both at the same time, because we might have mapped
|
||||
some registers to already used registers, so a double pass might not
|
||||
differentiate the two *)
|
||||
(* special care must be taken for the in and out registers *)
|
||||
let newcfg = {
|
||||
cfg with
|
||||
content = Cfg.NodeMap.map
|
||||
(fun x -> replaceregisters most_frequent_mapping least_frequent_mapping ["1"; "2"] x)
|
||||
cfg.content}
|
||||
in
|
||||
|
||||
match newcfg.inputOutputVar with
|
||||
| None -> newcfg (* if no input or output variables we ignore *)
|
||||
| Some (i, o) -> (
|
||||
match (VariableMap.find_opt i most_frequent_mapping,
|
||||
VariableMap.find_opt o most_frequent_mapping,
|
||||
VariableMap.find_opt i least_frequent_mapping,
|
||||
VariableMap.find_opt o least_frequent_mapping )
|
||||
with (*we check if in and out are simply remapped or are put in memory*)
|
||||
| Some i, Some o, _, _ ->
|
||||
{ newcfg with inputOutputVar = Some (i, o) }
|
||||
| Some i, None, _, Some mo -> ( (* since the output simbol is in memory
|
||||
we need to first retrive it and then
|
||||
put the result in a temporary
|
||||
register *)
|
||||
match newcfg.terminal with (* we check for the terminal node, if not
|
||||
present we are very confused and dont
|
||||
modify the out variable *)
|
||||
| None -> { newcfg with inputOutputVar = Some (i, o)}
|
||||
| Some n -> (
|
||||
let terminalcontent = (
|
||||
match Cfg.NodeMap.find_opt n newcfg.content with
|
||||
| None -> []
|
||||
| Some x -> x
|
||||
) @ [LoadI (mo, {index = "2"});
|
||||
Load ({index = "2"}, {index = "2"})]
|
||||
in
|
||||
let content = Cfg.NodeMap.add n terminalcontent newcfg.content in
|
||||
{ newcfg with
|
||||
inputOutputVar = Some (i, "2");
|
||||
content = content
|
||||
}
|
||||
)
|
||||
)
|
||||
| None, Some o, Some mi, _ -> ( (* the input simbol should be stored in
|
||||
memory *)
|
||||
match newcfg.initial with
|
||||
| None -> { newcfg with inputOutputVar = Some (i, o) }
|
||||
| Some n -> (
|
||||
let initialcontent =
|
||||
[(LoadI (mi, {index = "2"}) : RISCCfg.elt);
|
||||
Store ({index = "1"}, {index = "2"})] @ (
|
||||
match Cfg.NodeMap.find_opt n newcfg.content with
|
||||
| None -> []
|
||||
| Some x -> x
|
||||
)
|
||||
in
|
||||
let content = Cfg.NodeMap.add n initialcontent newcfg.content in
|
||||
{ newcfg with
|
||||
inputOutputVar = Some ("1", o);
|
||||
content = content
|
||||
}
|
||||
)
|
||||
)
|
||||
| None, None, Some mi, Some mo -> ( (* both simbols should be in
|
||||
memory *)
|
||||
match newcfg.initial, newcfg.terminal with
|
||||
| None, None -> { newcfg with inputOutputVar = Some (i, o) }
|
||||
| None, Some n -> (
|
||||
let terminalcontent = (
|
||||
match Cfg.NodeMap.find_opt n newcfg.content with
|
||||
| None -> []
|
||||
| Some x -> x
|
||||
) @ [LoadI (mo, {index = "2"});
|
||||
Load ({index = "2"}, {index = "2"})]
|
||||
in
|
||||
let content = Cfg.NodeMap.add n terminalcontent newcfg.content in
|
||||
{ newcfg with
|
||||
inputOutputVar = Some (i, "2");
|
||||
content = content
|
||||
}
|
||||
)
|
||||
| Some n, None -> (
|
||||
let initialcontent =
|
||||
[(LoadI (mi, {index = "2"}) : RISCCfg.elt);
|
||||
Store ({index = "1"}, {index = "2"})] @ (
|
||||
match Cfg.NodeMap.find_opt n newcfg.content with
|
||||
| None -> []
|
||||
| Some x -> x
|
||||
)
|
||||
in
|
||||
let content = Cfg.NodeMap.add n initialcontent newcfg.content in
|
||||
{ newcfg with
|
||||
inputOutputVar = Some ("1", o);
|
||||
content = content
|
||||
}
|
||||
)
|
||||
| Some ni, Some no -> (
|
||||
let initialcontent =
|
||||
[(LoadI (mi, {index = "2"}) : RISCCfg.elt);
|
||||
Store ({index = "1"}, {index = "2"})] @ (
|
||||
match Cfg.NodeMap.find_opt ni newcfg.content with
|
||||
| None -> []
|
||||
| Some x -> x
|
||||
)
|
||||
in
|
||||
let terminalcontent = (
|
||||
match Cfg.NodeMap.find_opt no newcfg.content with
|
||||
| None -> []
|
||||
| Some x -> x
|
||||
) @ [LoadI (mo, {index = "2"});
|
||||
Load ({index = "2"}, {index = "2"})]
|
||||
in
|
||||
let content = Cfg.NodeMap.add ni initialcontent newcfg.content in
|
||||
let content = Cfg.NodeMap.add no terminalcontent content in
|
||||
{ newcfg with
|
||||
inputOutputVar = Some ("1", "2");
|
||||
content = content
|
||||
}
|
||||
)
|
||||
)
|
||||
| _ -> failwith ("ReduceRegisters: fail to partition a set, some" ^
|
||||
" registers have no binding.")
|
||||
)
|
||||
in
|
||||
|
||||
|
||||
( if List.length all_variables < n
|
||||
then cfg
|
||||
else aux cfg all_variables )
|
||||
3
lib/miniImp/reduceRegisters.mli
Normal file
3
lib/miniImp/reduceRegisters.mli
Normal file
@ -0,0 +1,3 @@
|
||||
module RISCCfg = CfgRISC.RISCCfg
|
||||
|
||||
val reduceregisters : int -> RISCCfg.t -> RISCCfg.t
|
||||
Reference in New Issue
Block a user