Fixes defined variables, fixes live variables, implements reduces registers, fixes risc semantic

This commit is contained in:
elvis
2024-12-27 21:11:38 +01:00
parent f1b4c3a17d
commit 3be05222ab
15 changed files with 866 additions and 214 deletions

View File

@ -0,0 +1,3 @@
module RISCCfg = CfgRISC.RISCCfg
val reduceregisters : int -> RISCCfg.t -> RISCCfg.t